3εFERRO - Energy Efficient Embedded Non-volatile Memory & Logic based on Ferroelectric Hf(Zr)O2
This project has received funding from the European Union’s Horizon 2020 research and innovation programme under grant agreement No 780302.
MAJOR PROJECT COMPONENTS

Materials
In a concerted effort between growth and advanced characterization teams 3ε FERRO will develop HfO2-based ferroelectrics focusing on the compatibility with Si semiconductor processing.

Circuits design
Advanced Logic-in memory (LiM) circuit designs will be employed to explore new ways of merging logic and memory. Coarse-grain LiM will be implemented in suitable platform (see below) using 1C-1T architecture at the BEOL of CMOS circuitry.

Embedded non-volatile memories
Optimized ferroelectric HfO2 layers in a 1T-1C architecture will be integrated with 130 nm CMOS in the back end of line (BEOL) using an advanced 200 mm pilot processing line to demonstrate suitability for eFeRAM solutions.